This is a temporal relations that prevents two clocks to tick simultaneously.

Example of CCSL specification:

 * c1 in exclusion with c2
 * @author: Julien DeAntoni
 * date : Wed jul 8th 2011

ClockConstraintSystem  MySpec {
    imports {
        import "ccsl:kernel" as kernelLib ; //add the kernel constraints to your specification
    entryBlock main

    Block main {

            Clock c1
            Clock c2
            Relation r1[Exclusion](Clock1 -> c1, Clock2 -> c2 )


Simulation results:

a Precedes simulation


On the bottom right, the clock domains are represented; here the two clocks are linked by an exclusion relation: #.